GL860A USB 2.0 UVC Camera Controller
0
1
Output
Input
1
0
RESERVED
BITMODE
-
Pixel data bit number.
0
1
8bit pixel date
10bit pixel date (In this mode, 10 bit data will be transferred to USB by
continuous two byte. The first byte is MSB 8 bit, and the next byte is LSB2
bit and 6’b0.)
Offset C1h – MCK_SAMP ………………………………………...…………… Default value = 8’h03
SAMP4
R/W
SAMP3
R/W
SAMP2
R/W
SAMP1
R/W
SAMP0
R/W
MCK2
R/W
MCK1
R/W
MCK0
R/W
7-3 SAMP[4:0]
2-0 MCK[2:0]
Sampling phase of data bus.
Selection of master clock to sensor (MCLK)
000 MCLK is 60MHz
001 MCLK is 30MHz
010 MCLK is 20MHz
011 MCLK is 15MHz
100 MCLK is 12MHz
101 MCLK is 10MHz
110 MCLK is 8.57MHz
111 MCLK is 7.5MHz
Address
Data
0x10
0x01
0xC1
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
CLOCK
60MHz
30
20
15
12
10
8.57
7.5
Address
Data
0x10
0x02
0xC1
0x00
0x01
0x02
0x03
0x04
0x05
CLOCK
30MHz
15
10
7.5
6
5
©2007 GenesysLogic, Inc. - All rights reserved.
Page 28
GENESYS [ GENESYS LOGIC ]
