GL860A USB 2.0 UVC Camera Controller
7-2 RESERVED
-
1
0
FRAM_EN
HEAD_EN
Set 1 to enable, header function..
Set 1 to add Header for each frame, Set 0 to add Header for each SOF.
Offset 61h – HEADCTL2 ……...………………………………………..……… Default value = 8’h00
--
--
--
--
--
--
--
--
HEADCNT0 HEADCNT0 HEADCNT0 HEADCNT0
R/W R/W R/W R/W
7-4 RESERVED
-
3-0 HEADCNT[3:0] Select header byte count from 0~8.
Offset 62h – HEAD0 ……………………………………………………..……… Default value = 8’h00
H0DAT7
R/W
H0DAT6
R/W
H0DAT5
R/W
H0DAT4
R/W
H0DAT3
R/W
H0DAT2
R/W
H0DAT1
R/W
H0DAT0
R/W
7-0 H0DAT[7:0]
Head data 0.
Offset 63h – HEAD1 ……………………………………………………..……… Default value = 8’h00
H1DAT7
R/W
H1DAT6
R/W
H1DAT5
R/W
H1DAT4
R/W
H1DAT3
R/W
H1DAT2
R/W
H1DAT1
R/W
H1DAT0
R/W
7-0 H1DAT[7:0]
Head data 1.
4.2.3 Sensor Register Part
Offset C0h – SENCTL ………………………………………..……..………… Default value = 8’h00
INCTST EDGESEL CLKOE
VSATV
R/W
HSATV
R/W
HVOE
R/W
--
--
BITMODE
R/W
R/W
R/W
R/W
7
6
INCTST
EDGESEL
0
1
No incremental data on CMSDAT[9:0]
Incremental data on CMSDAT[9:0] for debugging
Rising/Falling edge of PIX_CLK selection
0
1
The same with the PIX_CLK
Inverse with the PIX_CLK
5
4
3
2
CLKOE
VSATV
HSATV
HVOE
MAS_CLK output selection
0
1
Input clock (PIX_CLK)
Output clock (MAS_CLK)
Select of timing to reset internal line count when VSYNC is coming from sensor.
0
1
Falling edge
Rising edge
Select of timing to reset internal pixel count when HSYNC is coming from sensor.
0
1
Falling edge
Rising edge
HSYNC/VSYNC output enable
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Page 27
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