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MB90613A 参数 Datasheet PDF下载

MB90613A图片预览
型号: MB90613A
PDF下载: 下载PDF文件 查看货源
内容描述: 16位微控制器专有 [16-bit Proprietary Microcontroller]
分类和应用: 微控制器
文件页数/大小: 91 页 / 1409 K
品牌: FUJITSU [ FUJITSU ]
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MB90610A Series  
Table 12 Multiplication and Division Instructions (Byte/Word/Long Word) [11 Instructions]  
Mnemonic  
#
~
RG  
B
Operation  
word (AH) /byte (AL)  
LH AH  
I
S T  
N
Z
V
C
RMW  
1
DIVU  
A
1
0
0
– –  
– –  
– –  
– –  
– –  
*
*
*
Quotient byte (AL) Remainder byte (AH)  
word (A)/byte (ear)  
2
DIVU  
DIVU  
A, ear  
2
1
0
1
0
0
*
*
*
*
*
*
*
*
*
Quotient byte (A) Remainder byte (ear)  
word (A)/byte (eam)  
6
3
A, eam 2+  
*
*
Quotient byte (A) Remainder byte (eam)  
long (A)/word (ear)  
4
DIVUW A, ear  
2
0
*
Quotient word (A) Remainder word (ear)  
long (A)/word (eam)  
5
7
DIVUW A, eam 2+  
*
*
Quotient word (A) Remainder word (eam)  
8
MULU  
MULU  
MULU  
A
1
2
0
1
0
byte (AH) *byte (AL) word (A)  
byte (A) *byte (ear) word (A)  
byte (A) *byte (eam) word (A)  
– –  
– –  
– –  
0
0
(b)  
*
9
A, ear  
*
10  
A, eam 2+  
*
MULUW A  
1
2
11  
12  
13  
0
1
0
word (AH) *word (AL) long (A)  
word (A) *word (ear) long (A)  
word (A) *word (eam) long (A)  
– –  
– –  
– –  
0
0
(c)  
*
*
*
MULUW A, ear  
MULUW A, eam 2+  
*1: 3 when the result is zero, 7 when an overflow occurs, and 15 normally.  
*2: 4 when the result is zero, 8 when an overflow occurs, and 16 normally.  
*3: 6 + (a) when the result is zero, 9 + (a) when an overflow occurs, and 19 + (a) normally.  
*4: 4 when the result is zero, 7 when an overflow occurs, and 22 normally.  
*5: 6 + (a) when the result is zero, 8 + (a) when an overflow occurs, and 26 + (a) normally.  
*6: (b) when the result is zero or when an overflow occurs, and 2 × (b) normally.  
*7: (c) when the result is zero or when an overflow occurs, and 2 × (c) normally.  
*8: 3 when byte (AH) is zero, and 7 when byte (AH) is not zero.  
*9: 4 when byte (ear) is zero, and 8 when byte (ear) is not zero.  
*10: 5 + (a) when byte (eam) is zero, and 9 + (a) when byte (eam) is not 0.  
*11: 3 when word (AH) is zero, and 11 when word (AH) is not zero.  
*12: 4 when word (ear) is zero, and 12 when word (ear) is not zero.  
*13: 5 + (a) when word (eam) is zero, and 13 + (a) when word (eam) is not zero.  
Note: For an explanation of “(a)” to “(d)”, refer to Table 4, “Number of Execution Cycles for Each Type of Addressing,”  
and Table 5, “Correction Values for Number of Cycles Used to Calculate Number of Actual Cycles.”  
80  
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