MB90610A Series
Table 7 Transfer Instructions (Byte) [41 Instructions]
Mnemonic
#
~
RG
B
Operation
LH AH
I
S
T
N
Z
V
C RMW
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
A, dir
2
3
1
2
3
4
2
2
0
0
1
1
0
0
0
0
2
0
(b) byte (A) ← (dir)
Z
Z
Z
Z
Z
Z
Z
Z
Z
Z
*
*
*
*
*
*
*
–
*
*
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
*
*
*
*
*
*
*
*
*
*
*
*
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
A, addr16
A, Ri
(b) byte (A) ← (addr16)
0
0
byte (A) ← (Ri)
byte (A) ← (ear)
*
A, ear
A, eam
A, io
*
2+ 3+ (a)
(b) byte (A) ← (eam)
(b) byte (A) ← (io)
*
2
2
2
3
1
3
2
3
10
1
*
A, #imm8
A, @A
0
byte (A) ← imm8
*
(b) byte (A) ← ((A))
*
A, @RLi+disp8
(b) byte (A) ← ((RLi)+disp8)
*
MOVN A, #imm4
0
byte (A) ← imm4
R
MOVX A, dir
2
3
2
2
3
4
2
2
0
0
1
1
0
0
0
0
1
2
(b) byte (A) ← (dir)
X
X
X
X
X
X
X
X
X
X
*
*
*
*
*
*
*
–
*
*
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
MOVX A, addr16
MOVX A, Ri
(b) byte (A) ← (addr16)
0
0
byte (A) ← (Ri)
byte (A) ← (ear)
MOVX A, ear
MOVX A, eam
MOVX A, io
MOVX A, #imm8
MOVX A, @A
MOVX A,@RWi+disp8
MOVX A, @RLi+disp8
2+ 3+ (a)
(b) byte (A) ← (eam)
(b) byte (A) ← (io)
2
2
2
2
3
3
2
0
byte (A) ← imm8
3
(b) byte (A) ← ((A))
5
(b) byte (A) ← ((RWi)+disp8)
(b) byte (A) ← ((RLi)+disp8)
10
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
MOV
dir, A
2
3
1
2
3
4
2
2
0
0
1
1
0
0
2
2
1
2
1
1
0
0
1
0
0
(b) byte (dir) ← (A)
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
*
*
*
*
*
*
*
*
*
*
*
*
–
–
*
–
*
*
*
*
*
*
*
*
*
*
*
*
*
–
–
*
–
*
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
addr16, A
Ri, A
(b) byte (addr16) ← (A)
0
0
byte (Ri) ← (A)
byte (ear) ← (A)
ear, A
eam, A
2+ 3+ (a)
(b) byte (eam) ← (A)
(b) byte (io) ← (A)
io, A
2
3
2
3
10
3
@RLi+disp8, A
Ri, ear
(b) byte ((RLi) +disp8) ← (A)
0
byte (Ri) ← (ear)
Ri, eam
ear, Ri
2+ 4+ (a)
(b) byte (Ri) ← (eam)
byte (ear) ← (Ri)
(b) byte (eam) ← (Ri)
2
4
0
eam, Ri
Ri, #imm8
io, #imm8
dir, #imm8
ear, #imm8
eam, #imm8
@AL, AH
2+ 5+ (a)
2
3
3
3
2
5
5
2
0
byte (Ri) ← imm8
(b) byte (io) ← imm8
(b) byte (dir) ← imm8
0
byte (ear) ← imm8
3+ 4+ (a)
2
(b) byte (eam) ← imm8
(b) byte ((A)) ← (AH)
3
/MOV @A, T
XCH
XCH
XCH
XCH
A, ear
2
4
2
0
4
2
0
byte (A) ↔ (ear)
2× (b) byte (A) ↔ (eam)
byte (Ri) ↔ (ear)
2× (b) byte (Ri) ↔ (eam)
Z
Z
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
A, eam
Ri, ear
Ri, eam
2+ 5+ (a)
2
7
0
2+ 9+ (a)
Note: Foranexplanationof“(a)”to“(d)”, refertoTable4, “NumberofExecutionCyclesforEachTypeofAddressing,”
and Table 5, “Correction Values for Number of Cycles Used to Calculate Number of Actual Cycles.”
76
FUJITSU [ FUJITSU ]
