MB90480/485 Series
(2) Block Diagram
Internal data bus
TMRLR
16-bit reload register
Reload signal
Reload
control
circuit
TMR
16-bit timer register
(down counter)
UF
CLK
Count clock generator circuit
Gate
input
Wait signal
3
Valid clock
detection circuit
Machine
clock φ
Prescaler
Clear
CLK
To A/D
converter
Output signal
generation circuit
Inverted
Pin
(TIN0)
Input control
circuit
Output signal
generation circuit
Pin
(TOT0)
Clock
selector
EN
External clock
Select signal
Operation
control circuit
OUTL
RELD
3
2
Function
selection
OUTE
Timer control status register (TMCSR)
60
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