MB90480/485 Series
10. 16-bit Reload Timer
The 16-bit reload timer provides a choice of functions, including internal clock signals that count down in
synchronization with three types of internal clock, as well as an event count mode that counts down at specified
edge detection events in pulse signals input from external pins. This timer defines an underflow as a change in
count value from 0000H to FFFFH. Thus an underflow will occur when counting from the value “reload register
setting value + 1”. The choice of counting operations includes reload mode, in which the count setting values is
reloaded and counting continues following an underflow event, and one-shot mode, in which an underflow event
causes counting to stop. An interrupt can be generated at counter underflow, and the timer is DTC compatible.
(1) Register List
• TMCSR (Timer control status register)
Timer control status register (high) (TMCSR)
15
14
13
12
11
10
9
8
0000CBH
⎯
⎯
⎯
⎯
CSL1
CSL0
MOD2 MOD1
Read/Write
Initial value
⎯
⎯
⎯
⎯
⎯
⎯
⎯
⎯
R/W
0
R/W
0
R/W
0
R/W
0
Timer control status register (low) (TMCSR)
7
6
5
4
3
2
1
0
0000CAH
MOD0 OUTE OUTL
RELD
INTE
UF
CNTE
TRG
Read/Write
Initial value
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
R/W
0
• 16-bit timer register/16-bit reload register
TMR/TMRLR (high)
15
14
13
12
11
10
9
8
0000CDH
D15
D14
D13
D12
D11
D10
D09
D08
Read/Write
Initial value
R/W
X
R/W
X
R/W
X
R/W
X
R/W
X
R/W
X
R/W
X
R/W
X
TMR/TMRLR (low)
0000CCH
7
6
5
4
3
2
1
0
D07
D06
D05
D04
D03
D02
D01
D00
Read/Write
Initial value
R/W
X
R/W
X
R/W
X
R/W
X
R/W
X
R/W
X
R/W
X
R/W
X
59
FUJITSU [ FUJITSU ]
