VDIP1 参数 Datasheet PDF下载

2.4 UART Interface Signal Descriptions

Page 

Ta�½le 4 - Data and Control �½�½us �½ignal Mode �½ptions - �½�½�½T Inter�½ace

Pin No.

6

8

9

10

11

12

1�½

14

1�½

Name

TXD

�½XD

RT�½#

CT�½#

�½TR#

�½�½R#

�½C�½#

RI#

TX�½�½N#

Type

�½utput

Input

�½utput

Input

�½utput

Input

Input

Input

Input

Description

Transmit asynchronous data output

�½eceive asynchronous data input

�½e�½uest To �½end Control �½utput / Handsha�½e signal

Clear To �½end Control Input / Handsha�½e signal

Data Terminal �½eady Control �½utput / Handsha�½e signal

Data �½et �½eady Control Input / Handsha�½e signal

Data Carrier Detect Control Input

R�½�½g I�½�½�½�½�½�½�½�½�½ C�½�½�½�½�½�½l I�½pu�½�½ Wh�½�½ �½h�½ R�½m�½�½�½ W�½k�½ up �½p�½�½�½�½ �½�½ �½�½�½bl�½�½ �½�½ �½h�½ �½�½�½ROM�½�½ �½�½k�½�½g RI#

low can �½e used to resume the PC �½�½�½�½ Host controller �½rom suspend.

�½�½�½bl�½ T�½�½�½�½�½m�½�½ �½�½�½�½ �½�½�½�½ R�½485 �½�½�½�½g�½�½

VDIP1 Vinculum VNC1L Prototyping Module

Datasheet Version 0.92

© Future Technology Devices Intl Ltd. 2006-2007