Document Reference No.: FT_000237
V2DIP2-48 VNC2-48 Development Module Datasheet Version 1.01
Clearance No.: FTDI# 152
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3.8.1 Timing Diagram – Synchronous FIFO Mode Read and Write Cycle
When in Synchronous FIFO interface mode, the timing of a read and write operation on the FIFO interface
are shown in Figure 3.5 and Table 3.10
Figure 3.5 - Synchronous FIFO Mode Read and Write Cycle
Time
Description
CLKOUT period
Min
Typical
Max
Uni
-
t1
t2
20.83
ns
-
9.38
9.38
1
11.46
CLKOUT high period
CLKOUT low period
CLKOUT to RXF#
10.42
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
11.46
t3
10.42
7.83
t4
-
-
-
-
-
-
-
-
-
-
-
7.83
t5
CLKOUT to read DATA valid
OE# to read DATA valid
CLKOUT to OE#
1
7.83
t6
1
7.83
t7
1
t8
RD# setup time
-
-
-
-
-
-
-
12
0
t9
RD# hold time
t10
t11
t12
t13
t14
CLKOUT TO TXE#
Write DATA setup time
Write DATA hold time
WR# setup time
1
12
0
12
0
WR# hold time
Table 3.10 - Synchronous FIFO Mode Read and Write Cycle Timing
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