DS_FT311D USB ANDROID HOST IC Datasheet
Version 1.0
Document No.: FT_000660 Clearance No.: FTDI# 305
Synchronous serial data link.
Full and half duplex data transmission.
Serial clock with programmable frequency, polarity and phase.
One slave select output.
5.5.3.1 SPI Master Signal Descriptions.
Table 5.5 shows the SPI master signals and the pins
Name
Type
Description
Pin No
spi_m_clk
Output
SPI master clock input
29
Master Out Slave In
spi_m_mosi
spi_m_miso
Output
Input
30
Synchronous data from master to slave
Master In Slave Out
31
26
Synchronous data from slave to master
Active low slave select 0 from master to
slave
spi_m_ss_0# Output
Table 5.5 SPI Master Signal Names
The main purpose of the SPI Master block is to transfer data between an external SPI interface and the
FT311D.
An SPI master interface transfer can only be initiated by the SPI Master and begins with the slave select
signal being asserted. This is followed by a data byte being clocked out with the master supplying SCLK.
The master typically supplies the first byte, which is called a command byte. After this the desired
number of data bytes are transferred before the transaction is terminated by the master de-asserting
slave select. However the FT311D is simply a data pipe and no command is required by the FT311D itself.
Any command protocol would be defined by the Android application.
The SPI Master will transmit on MOSI as well as receive on MISO during every data stage.
Figure 5-6 Typical SPI Master Timing and Table 5.6 SPI Master Timing show an example of this.
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