DS
_FT311D
USB ANDROID HOST IC Datasheet
Version 1.0
Document No.: FT_000660 Clearance No.: FTDI#
305
5.5.2 Serial Peripheral Interface – Slave
CLK
SS#
External - SPI Master
MOSI
MISO
FT311 - SPI Slave
Figure 5-4 SPI Slave block diagram
FT311D has an SPI Slave module that uses four wire interfaces: MOSI, MISO, CLK and SS#. An SPI
transfer can only be initiated by the SPI Master and begins with the slave select signal being asserted.
This is followed by a data byte being clocked out with the master supplying CLK. The master always
supplies the first byte, which is called a command byte. After this the desired number of data bytes are
transferred before the transaction is terminated by the master de-asserting slave select. An SPI Master is
able to abort a transfer at any time by de-asserting its SS# output. This will cause the Slave to end its
current transfer and return to idle state.
5.5.2.1 SPI Slave Signal Descriptions
Pin No
Name
Type
Description
29
spi_s0_clk
Input
Slave clock input
Master Out Slave In
30
spi_s0_mosi
Input
Synchronous data from master to slave
Master In Slave Out
31
spi_s0_miso
Output
Synchronous data from slave to master
26
spi_s0_ss#
Input
Slave select
Table 5.4 Data and Control Bus Signal Mode Options - SPI Slave Interface
5.5.3 Serial Peripheral Interface – SPI Master
CLK
SS#
FT311 - SPI Master
MOSI
MISO
External - SPI Slave
Figure 5-5 SPI Master block diagram
The SPI Master interface is used to interface to applications such as Real time clocks and audio codecs.
The SPI Master provides the following features:
Copyright © 2012 Future Technology Devices International Limited
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