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DS_FT313H 参数 Datasheet PDF下载

DS_FT313H图片预览
型号: DS_FT313H
PDF下载: 下载PDF文件 查看货源
内容描述: 该FT313H是一个高速通用串行总线( USB )主机控制器,通用串行总线规范2.0版兼容,并支持高达480M bit / s的数据传输速度。 [The FT313H is a Hi-Speed Universal Serial Bus (USB) Host Controller compatible with Universal Serial Bus Specification Rev 2.0 and supports data transfer speeds of up to 480M bit/s.]
分类和应用: 数据传输控制器
文件页数/大小: 64 页 / 1588 K
品牌: FTDI [ FUTURE TECHNOLOGY DEVICES INTERNATIONAL LTD. ]
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Document No.: FT_000589  
FT313H USB2.0 HS Host Controller Datasheet Version 1.1  
Clearance No.: FTDI# 318  
Bit  
Name  
Type  
Default value Description  
0: No SOF event has occurred.  
1: SOF event has occurred.  
0
MSOFINT  
R/WC  
1’b0  
uSOF interrupt  
The INT line will be asserted if the  
respective enable bit in the HCINTEN  
register is set.  
0: No uSOF event has occurred.  
1: uSOF event has occurred.  
Table 5-24 HC interrupt status register  
5.4.2 HCINTEN register (address = A4h)  
Bit  
Name  
Type  
RO  
Default value  
10’b0  
Description  
-
[15: 8]  
7
Reserved  
WAKEUPINT_EN  
R/W  
1’b0  
Wake up interrupt enable on device  
connect or disconnect  
Control the INT generation when the device  
connects or disconnects as wake up events.  
0: No INT will be generated when device  
connects or disconnects as wake up events.  
1: INT will be asserted when device connects  
or disconnects as wake up events.  
6
OCINT_EN  
R/W  
1’b0  
Overcurrent interrupt enable  
Control the INT generation when the  
overcurrent event triggers  
0: No INT will be generated after overcurrent  
event is triggered.  
1: INT will be asserted after overcurrent event  
is triggered.  
5
4
CLKREADY_EN  
R/W  
R/W  
1’b0  
1’b0  
Clock ready enable  
Control the INT generation when the internal  
clock signals are running stable  
0: No INT will be generated after clock runs  
stable.  
1: INT will be asserted after clock runs stable.  
USB Bus inactive enable  
BUSINACTIVE_EN  
Control the INT generation when the USB bus  
is inactive  
0: No INT will be generated when the USB bus  
is inactive.  
1: INT will be asserted when the USB bus is  
inactive.  
3
R/W  
1’b0  
Remote wake up interrupt enable  
Copyright © 2012 Future Technology Devices International Limited  
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