Bus Signal Timing
Table 12 shows the PCMCIA port timing for the MPC885/880.
Table 12. PCMCIA Port Timing
33 MHz 40 MHz
Min Max Min Max Min Max Min Max
66 MHz
80 MHz
Num
Characteristic
Unit
CLKOUT to OPx valid
(MAX = 0.00 × B1 + 19.00)
—
19.00
—
—
19.00
—
—
19.00
—
—
19.00 ns
P57
P58
P59
P60
HRESET negated to OPx drive 1
(MIN = 0.75 × B1 + 3.00)
25.70
5.00
1.00
21.70
5.00
1.00
14.40
5.00
1.00
12.40
5.00
1.00
—
—
—
ns
ns
ns
IP_Xx valid to CLKOUT rising edge
(MIN = 0.00 × B1 + 5.00)
—
—
—
CLKOUT rising edge to IP_Xx invalid
(MIN = 0.00 × B1 + 1.00)
—
—
—
1 OP2 and OP3 only.
Figure 30 provides the PCMCIA output port timing for the MPC885/880.
CLKOUT
P57
Output
Signals
HRESET
P58
OP2, OP3
Figure 30. PCMCIA Output Port Timing
Figure 31 provides the PCMCIA input port timing for the MPC885/880.
CLKOUT
P59
P60
Input
Signals
Figure 31. PCMCIA Input Port Timing
MPC885/MPC880 Hardware Specifications, Rev. 3
40
Freescale Semiconductor
FREESCALE [ Freescale ]
