RapidIO
shows the definitions of the data to clock static skew parameter t
SKEW,PAIR
and the data valid
window parameter DV. The data and frame bits are those that are associated with the clock. The figure
applies for all zero-crossings of the clock. All of the signals are differential signals. V
D
represents V
OD
for
the transmitter and V
ID
for the receiver. The center of the eye is defined as the midpoint of the region in
which the magnitude of the signal voltage is greater than or equal to the minimum DV voltage.
V
D
Clock x
1.0 UI Nominal
0.5 UI
V
D
Clock x
t
SKEW,PAIR
0.5 DV
D[0:7]/D[8:15], FRAME
0.5 DV
V
HDmim
V
HDmim
V
D
= 0 V
V
D
= 0 V
Eye Opening
DV
Figure 41. Data to Clock Skew
shows the definition of the data to data static skew parameter t
DPAIR
and how the skew
parameters are applied.
Center Point for Clock
CLK0 (CLK1)
1.0 UI Nominal
0.5 UI
Center point of the
data valid window of
the earliest allowed data
bit for data grouped
late with respect
to clock
D[0:7]/D[8:15], FRAME
Center point of the
data valid window of
the latest allowed data
bit for data grouped
late with respect
to clock
t
DPAIR
t
SKEW,PAIR
Figure 42. Static Skew Diagram
MPC8540 Integrated Processor Hardware Specifications, Rev. 4
Freescale Semiconductor
65