Package and Pin Listings
Table 55. MPC8347EA (TBGA) Pinout Listing (continued)
Power
Notes
Signal
Package Pin Number
Pin Type
Supply
LALE
AK24
O
I/O
I/O
O
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
—
—
—
—
—
13
—
—
—
—
—
LGPL0/LSDA10/cfg_reset_source0
LGPL1/LSDWE/cfg_reset_source1
LGPL2/LSDRAS/LOE
LGPL3/LSDCAS/cfg_reset_source2
LGPL4/LGTA/LUPWAIT/LPBSE
LGPL5/cfg_clkin_div
LCKE
AP27
AL25
AJ24
AN27
I/O
I/O
I/O
O
AP28
AL26
AM27
LCLK[0:2]
AN28, AK26, AP29
O
LSYNC_OUT
AM12
O
LSYNC_IN
AJ10
General Purpose I/O Timers
F24
I
GPIO1[0]/DMA_DREQ0/GTM1_TIN1/
GTM2_TIN2
I/O
I/O
OVDD
OVDD
—
—
GPIO1[1]/DMA_DACK0/GTM1_TGATE1/
GTM2_TGATE2
E24
GPIO1[2]/DMA_DDONE0/GTM1_TOUT1
B25
D24
I/O
I/O
OVDD
OVDD
—
—
GPIO1[3]/DMA_DREQ1/GTM1_TIN2/
GTM2_TIN1
GPIO1[4]/DMA_DACK1/GTM1_TGATE2/
GTM2_TGATE1
A25
B24
A24
D23
I/O
I/O
I/O
I/O
OVDD
OVDD
OVDD
OVDD
—
—
—
—
GPIO1[5]/DMA_DDONE1/GTM1_TOUT2/
GTM2_TOUT1
GPIO1[6]/DMA_DREQ2/GTM1_TIN3/
GTM2_TIN4
GPIO1[7]/DMA_DACK2/GTM1_TGATE3/
GTM2_TGATE4
GPIO1[8]/DMA_DDONE2/GTM1_TOUT3
B23
A23
I/O
I/O
OVDD
OVDD
—
—
GPIO1[9]/DMA_DREQ3/GTM1_TIN4/
GTM2_TIN3
GPIO1[10]/DMA_DACK3/GTM1_TGATE4/
GTM2_TGATE3
F22
E22
I/O
I/O
OVDD
OVDD
—
—
GPIO1[11]/DMA_DDONE3/GTM1_TOUT4/
GTM2_TOUT3
USB Port 1
A26
MPH1_D0_ENABLEN/DR_D0_ENABLEN
MPH1_D1_SER_TXD/DR_D1_SER_TXD
MPH1_D2_VMO_SE0/DR_D2_VMO_SE0
I/O
I/O
I/O
OVDD
OVDD
OVDD
—
—
—
B26
D25
MPC8347EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 12
Freescale Semiconductor
61
FREESCALE [ Freescale ]
