Package and Pin Listings
Table 55. MPC8347EA (TBGA) Pinout Listing (continued)
Power
Supply
Signal
Package Pin Number
Pin Type
Notes
MPH1_D3_SPEED/DR_D3_SPEED
MPH1_D4_DP/DR_D4_DP
A27
B27
C27
D26
E26
D27
A28
I/O
I/O
I/O
I/O
I/O
I
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
—
—
—
—
—
—
—
MPH1_D5_DM/DR_D5_DM
MPH1_D6_SER_RCV/DR_D6_SER_RCV
MPH1_D7_DRVVBUS/DR_D7_DRVVBUS
MPH1_NXT/DR_SESS_VLD_NXT
MPH1_DIR_DPPULLUP/
I/O
DR_XCVR_SEL_DPPULLUP
MPH1_STP_SUSPEND/
DR_STP_SUSPEND
F26
E27
O
I
OVDD
OVDD
—
—
MPH1_PWRFAULT/
DR_RX_ERROR_PWRFAULT
MPH1_PCTL0/DR_TX_VALID_PCTL0
MPH1_PCTL1/DR_TX_VALIDH_PCTL1
MPH1_CLK/DR_CLK
A29
O
O
I
OVDD
OVDD
OVDD
—
—
—
D28
B29
USB Port 0
MPH0_D0_ENABLEN/DR_D8_CHGVBUS
MPH0_D1_SER_TXD/DR_D9_DCHGVBUS
MPH0_D2_VMO_SE0/DR_D10_DPPD
MPH0_D3_SPEED/DR_D11_DMMD
MPH0_D4_DP/DR_D12_VBUS_VLD
MPH0_D5_DM/DR_D13_SESS_END
MPH0_D6_SER_RCV/DR_D14
C29
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
OVDD
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
A30
E28
B30
C30
A31
B31
MPH0_D7_DRVVBUS/DR_D15_IDPULLUP
MPH0_NXT/DR_RX_ACTIVE_ID
C31
B32
MPH0_DIR_DPPULLUP/DR_RESET
MPH0_STP_SUSPEND/DR_TX_READY
MPH0_PWRFAULT/DR_RX_VALIDH
MPH0_PCTL0/DR_LINE_STATE0
MPH0_PCTL1/DR_LINE_STATE1
MPH0_CLK/DR_RX_VALID
A32
I/O
I/O
I
A33
C32
D31
I/O
I/O
I
E30
B33
Programmable Interrupt Controller
MCP_OUT
AN33
C19
O
OVDD
OVDD
OVDD
2
IRQ0/MCP_IN/GPIO2[12]
IRQ[1:5]/GPIO2[13:17]
I/O
I/O
—
—
C22, A22, D21, C21, B21
MPC8347EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 12
Freescale Semiconductor
62
FREESCALE [ Freescale ]
