SPI
Table 53. SPI DC Electrical Characteristics (continued)
Parameter
Symbol
Condition
Min
Max
Unit
Input current
IIN
—
—
2.4
—
5
—
μA
V
Output high voltage
Output low voltage
Output low voltage
VOH
VOL
IOH = –8.0 mA
IOL = 8.0 mA
IOL = 3.2 mA
0.5
0.4
V
V
—
V
OL
17.2 SPI AC Timing Specifications
Table 54 provides the SPI input and output AC timing specifications.
1
Table 54. SPI AC Timing Specifications
Parameter
Symbol2
Min
Max
Unit
SPI outputs valid—Master mode (internal clock) delay
SPI outputs hold—Master mode (internal clock) delay
SPI outputs valid—Slave mode (external clock) delay
SPI outputs hold—Slave mode (external clock) delay
SPI inputs—Master mode (internal clock input setup time
SPI inputs—Master mode (internal clock input hold time
SPI inputs—Slave mode (external clock) input setup time
SPI inputs—Slave mode (external clock) input hold time
Notes:
tNIKHOV
tNIKHOX
tNEKHOV
tNEKHOX
tNIIVKH
—
0.5
—
2
6
ns
ns
ns
ns
ns
ns
ns
ns
—
8
—
—
—
—
—
4
tNIIXKH
0
tNEIVKH
tNEIXKH
4
2
1. Output specifications are measured from the 50 percent level of the rising edge of CLKIN to the 50 percent level of the signal.
Timings are measured at the pin.
2. The symbols for timing specifications follow the pattern of t(first two letters of functional block)(signal)(state)(reference)(state) for inputs
and t(first two letters of functional block)(reference)(state)(signal)(state) for outputs. For example, tNIKHOX symbolizes the internal timing
(NI) for the time SPICLK clock reference (K) goes to the high state (H) until outputs (O) are invalid (X).
Figure 37 provides the AC test load for the SPI.
OVDD/2
Output
Z0 = 50 Ω
RL = 50 Ω
Figure 37. SPI AC Test Load
MPC8347EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 12
Freescale Semiconductor
53
FREESCALE [ Freescale ]
