Peripheral operating requirements and behaviors
6.2 System modules
There are no specifications necessary for the device's system modules.
6.3 Clock modules
6.3.1 MCG specifications
Table 12. MCG specifications
Symbol Description
Min.
Typ.
Max.
Unit
Notes
fints_ft Internal reference frequency (slow clock) —
—
32.768
—
kHz
factory trimmed at nominal VDD and 25 °C
fints_t
Internal reference frequency (slow clock) — user
trimmed
31.25
—
—
39.0625
0.6
kHz
Δfdco_res_t Resolution of trimmed average DCO output
frequency at fixed voltage and temperature —
using SCTRIM and SCFTRIM
0.3
%fdco
1
Δfdco_t
Total deviation of trimmed average DCO output
frequency over voltage and temperature
—
—
+0.5/-0.7
0.4
3
%fdco
%fdco
1, 2
1, 2
Δfdco_t
Total deviation of trimmed average DCO output
frequency over fixed voltage and temperature
range of 0 - 70 °C
1.5
fintf_ft
Internal reference frequency (fast clock) —
factory trimmed at nominal VDD and 25 °C
—
—
4
—
3
MHz
Δfintf_ft
Frequency deviation of internal reference clock
(fast clock) over temperature and voltage ---
factory trimmed at nominal VDD and 25 °C
+1/-2
%fintf_ft
2
fintf_t
Internal reference frequency (fast clock) — user
trimmed at nominal VDD and 25 °C
3
—
—
—
5
MHz
kHz
kHz
floc_low
floc_high
Loss of external clock minimum frequency —
RANGE = 00
(3/5) x
fints_t
—
—
Loss of external clock minimum frequency —
RANGE = 01, 10, or 11
(16/5) x
fints_t
FLL
ffll_ref
fdco
FLL reference frequency range
31.25
20
—
39.0625
25
kHz
DCO output
Low range (DRS = 00)
640 × ffll_ref
20.97
MHz
3, 4
frequency range
Mid range (DRS = 01)
1280 × ffll_ref
40
41.94
48
MHz
Table continues on the next page...
KL24 Sub-Family Data Sheet Data Sheet, Rev. 3, 9/19/2012.
Freescale Semiconductor, Inc.
25
FREESCALE [ Freescale ]
