General
Table 10. General switching specifications (continued)
Symbol
Description
Min.
Max.
Unit
Notes
Port rise and fall time (low drive strength)
• Slew disabled
5
• 1.71 ≤ VDD ≤ 2.7V
• 2.7 ≤ VDD ≤ 3.6V
• Slew enabled
—
—
12
6
ns
ns
—
—
36
24
ns
ns
• 1.71 ≤ VDD ≤ 2.7V
• 2.7 ≤ VDD ≤ 3.6V
1. This is the minimum pulse width that is guaranteed to pass through the pin synchronization circuitry. Shorter pulses may or
may not be recognized. In Stop, VLPS, LLS, and VLLSx modes, the synchronizer is bypassed so shorter pulses can be
recognized in that case.
2. The greater synchronous and asynchronous timing must be met.
3. This is the minimum pulse width that is guaranteed to be recognized as a pin interrupt request in Stop, VLPS, LLS, and
VLLSx modes.
4. 75pF load
5. 15pF load
5.4 Thermal specifications
5.4.1 Thermal operating requirements
Table 11. Thermal operating requirements
Symbol
Description
Min.
Max.
Unit
TJ
Die junction temperature
–40
125
°C
TA
Ambient temperature
–40
105
°C
5.4.2 Thermal attributes
Board type
Symbol
Description
64 MAPBGA 64 LQFP
Unit
Notes
Single-layer
(1s)
RθJA
Thermal
resistance,
junction to
107
65
°C/W
1, 2
ambient (natural
convection)
Four-layer
(2s2p)
RθJA
Thermal
resistance,
junction to
56
46
°C/W
1, 3
ambient (natural
convection)
Table continues on the next page...
K20 Sub-Family Data Sheet, Rev. 4 5/2012.
Freescale Semiconductor, Inc.
21
FREESCALE [ Freescale ]
