Freescale Semiconductor, Inc.
TABLE OF CONTENTS
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Title
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SECTION 9 TIMING SYSTEM
9.1
9.2
9.2.1
9.2.2
9.2.3
9.3
9.3.1
9.3.2
9.3.3
9.3.4
9.3.5
9.3.6
9.3.7
9.3.8
9.3.9
9.3.10
9.4
Timer Structure ..........................................................................................9-3
Input Capture .............................................................................................9-5
Timer Control Register 2 ...................................................................9-5
Timer Input Capture Registers ..........................................................9-6
Timer Input Capture 4/Output Compare 5 Register ..........................9-6
Output Compare ........................................................................................9-6
Timer Output Compare Registers .....................................................9-7
Timer Compare Force Register .........................................................9-8
Output Compare Mask Registers ......................................................9-8
Output Compare Data Register .........................................................9-9
Timer Counter Register .....................................................................9-9
Timer Control Register 1 ...................................................................9-9
Timer Interrupt Mask Register 1 ......................................................9-10
Timer Interrupt Flag Register 1 .......................................................9-11
Timer Interrupt Mask Register 2 ......................................................9-11
Timer Interrupt Flag Register 2 .......................................................9-12
Real-Time Interrupt .................................................................................9-12
Timer Interrupt Mask Register 2 ......................................................9-13
Timer Interrupt Flag Register 2 .......................................................9-14
Pulse Accumulator Control Register ...............................................9-14
Computer Operating Properly Watchdog Function .................................9-15
Pulse Accumulator ..................................................................................9-15
Pulse Accumulator Control Register ...............................................9-16
Pulse Accumulator Count Register .................................................9-17
Pulse Accumulator Status and Interrupt Bits ...................................9-18
9.4.1
9.4.2
9.4.3
9.5
9.6
9.6.1
9.6.2
9.6.3
SECTION 10 ANALOG-TO-DIGITAL CONVERTER
10.1
Overview .................................................................................................10-1
Multiplexer .......................................................................................10-1
Analog Converter ............................................................................10-3
Digital Control ..................................................................................10-3
Result Registers ..............................................................................10-3
A/D Converter Clocks ......................................................................10-4
Conversion Sequence .....................................................................10-4
A/D Converter Power-Up and Clock Select .............................................10-5
Conversion Process ................................................................................10-5
Channel Assignments .............................................................................10-6
Single-Channel Operation .......................................................................10-6
Multiple-Channel Operation .....................................................................10-6
10.1.1
10.1.2
10.1.3
10.1.4
10.1.5
10.1.6
10.2
10.3
10.4
10.5
10.6
TECHNICAL DATA
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