Freescale Semiconductor, Inc.
TABLE OF CONTENTS
(Continued)
Paragraph
Title
Page
4.5
Chip Selects ............................................................................................4-18
Program Chip Select .......................................................................4-18
I/O Chip Selects ..............................................................................4-18
General-Purpose Chip Select ..........................................................4-19
4.5.1
4.5.2
4.5.3
SECTION 5 RESETS AND INTERRUPTS
5.1
Resets .......................................................................................................5-1
Power-On Reset ................................................................................5-1
External Reset (RESET) ...................................................................5-1
Computer Operating Properly (COP) Reset ......................................5-2
Clock Monitor Reset ..........................................................................5-2
OPTION Register ..............................................................................5-3
CONFIG Register ..............................................................................5-4
Effects of Reset .........................................................................................5-4
Central Processing Unit .....................................................................5-5
Memory Map .....................................................................................5-5
Parallel I/O .........................................................................................5-5
Timer .................................................................................................5-5
Real-Time Interrupt (RTI) ..................................................................5-5
Pulse Accumulator ............................................................................5-6
Computer Operating Properly (COP) ................................................5-6
Serial Communications Interface (SCI) .............................................5-6
Serial Peripheral Interface (SPI) ........................................................5-6
Analog-to-Digital Converter ...............................................................5-6
System ..............................................................................................5-6
Reset and Interrupt Priority .......................................................................5-6
Highest Priority Interrupt and Miscellaneous Register ......................5-7
Interrupts ...................................................................................................5-8
Interrupt Recognition and Register Stacking .....................................5-9
Non-Maskable Interrupt Request (XIRQ) ........................................5-10
Illegal Opcode Trap .........................................................................5-10
Software Interrupt ............................................................................5-11
Maskable Interrupts .........................................................................5-11
Reset and Interrupt Processing .......................................................5-11
Low Power Operation ..............................................................................5-16
WAIT ...............................................................................................5-17
STOP ...............................................................................................5-17
5.1.1
5.1.2
5.1.3
5.1.4
5.1.5
5.1.6
5.2
5.2.1
5.2.2
5.2.3
5.2.4
5.2.5
5.2.6
5.2.7
5.2.8
5.2.9
5.2.10
5.2.11
5.3
5.3.1
5.4
5.4.1
5.4.2
5.4.3
5.4.4
5.4.5
5.4.6
5.5
5.5.1
5.5.2
SECTION 6 PARALLEL INPUT/OUTPUT
6.1
Port A ........................................................................................................6-1
TECHNICAL DATA
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