Freescale Semiconductor, Inc.
TABLE OF CONTENTS
Paragraph
Title
Page
SECTION 1INTRODUCTION
1.1
Features ....................................................................................................1-1
SECTION 2 PIN DESCRIPTIONS
2.1
V
and V ..............................................................................................2-2
DD SS
2.2
2.3
2.4
2.5
2.6
2.7
Reset (RESET) ..........................................................................................2-3
E-Clock Output (E) ....................................................................................2-3
Crystal Driver and External Clock Input (XTAL, EXTAL) ...........................2-3
Four Times E-Clock Frequency Output (4XOUT) .....................................2-5
Interrupt Request (IRQ) .............................................................................2-5
Non-Maskable Interrupt (XIRQ) .................................................................2-5
2.8
MODA and MODB (MODA/LIR and MODB/V
) ..................................2-6
STBY
2.9
V
and V ..............................................................................................2-6
RH RL
2.10
2.11
2.11.1
2.11.2
2.11.3
2.11.4
2.11.5
2.11.6
2.11.7
R/W ...........................................................................................................2-6
Port Signals ...............................................................................................2-6
Port A ................................................................................................2-7
Port B ................................................................................................2-8
Port C ................................................................................................2-8
Port D ................................................................................................2-8
Port E ................................................................................................2-9
Port F .................................................................................................2-9
Port G ................................................................................................2-9
SECTION 3 CENTRAL PROCESSING UNIT
3.1
3.1.1
3.1.2
3.1.3
3.1.4
3.1.5
3.1.6
3.1.6.1
3.1.6.2
3.1.6.3
3.1.6.4
3.1.6.5
3.1.6.6
3.1.6.7
3.1.6.8
CPU Registers ...........................................................................................3-1
Accumulators A, B, and D .................................................................3-2
Index Register X (IX) .........................................................................3-3
Index Register Y (IY) .........................................................................3-3
Stack Pointer (SP) .............................................................................3-3
Program Counter (PC) ......................................................................3-5
Condition Code Register (CCR) ........................................................3-5
Carry/Borrow (C) .......................................................................3-5
Overflow (V) ..............................................................................3-5
Zero (Z) .....................................................................................3-6
Negative (N) ..............................................................................3-6
Interrupt Mask (I) .......................................................................3-6
Half Carry (H) ............................................................................3-6
X Interrupt Mask (X) ..................................................................3-6
Stop Disable (S) ........................................................................3-7
TECHNICAL DATA
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