Detailed Register Address Map
0x0034-0x003F Clock Reset and Power Management (CPMU) Map
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
R
W
R
0
0
0
0
0
0x0038
CPMUINT
RTIE
LOCKIE
0
OSCIE
0
RTIOSCS COPOSC
0x0039 CPMUCLKS
PLLSEL
0
PSTP
0
PRE
0
PCE
0
EL
SEL
W
R
0
0
0x003A
0x003B
CPMUPLL
CPMURTI
FM1
FM0
W
R
RTDEC
RTR6
RTR5
0
RTR4
0
RTR3
0
RTR2
RTR1
RTR0
W
R
0x003C
CPMUCOP
WCOP
RSBCK
CR2
CR1
CR0
W
WRTMAS
K
R
W
R
0
0
0
0
0
0
0
0
0
0
0
0
0
0x003D
0x003E
0x003F
Reserved
Reserved
Reserved For Factory Test
0
0
W
R
Reserved For Factory Test
0
0
6
0
5
0
4
0
3
0
2
0
1
0
CPMU
ARMCOP
W
Bit 7
Bit 0
0x0040-0x006F Timer Module (TIM) Map
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
R
W
R
0x0040
TIOS
IOS7
IOS6
IOS5
IOS4
IOS3
IOS2
IOS1
IOS0
0
0
0
0
0
0
0
0
0x0041
0x0042
0x0043
0x0044
0x0045
0x0046
0x0047
0x0048
0x0049
0x004A
0x004B
CFORC
OC7M
OC7D
W
R
FOC7
FOC6
FOC5
FOC4
FOC3
FOC2
FOC1
FOC0
OC7M7
OC7M6
OC7M5
OC7M4
OC7M3
OC7M2
OC7M1
OC7M0
W
R
OC7D7
Bit 15
OC7D6
14
OC7D5
13
OC7D4
12
OC7D3
11
OC7D2
10
OC7D1
9
OC7D0
Bit 8
W
R
TCNTH
TCNTL
TSCR1
TTOV
W
R
Bit 7
6
5
4
3
2
0
1
0
Bit 0
0
W
R
TEN
TOV7
OM7
TSWAI
TOV6
OL7
TSFRZ
TOV5
TFFCA
TOV4
OL6
PRNT
TOV3
W
R
TOV2
OL5
TOV1
OM4
TOV0
OL4
W
R
TCTL1
TCTL2
TCTL3
TCTL4
OM6
OM5
W
R
OM3
OL3
OM2
OL2
OM1
OL1
OM0
OL0
W
R
EDG7B
EDG3B
EDG7A
EDG3A
EDG6B
EDG2B
EDG6A
EDG2A
EDG5B
EDG1B
EDG5A
EDG1A
EDG4B
EDG0B
EDG4A
EDG0A
W
R
W
S12P-Family Reference Manual, Rev. 1.13
Freescale Semiconductor
549