Detailed Register Address Map
0x0040-0x006F Timer Module (TIM) Map
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
R
W
R
0x0063
PACNTL
PACNT7
0
PACNT6
0
PACNT5
0
PACNT4
0
PACNT3
0
PACNT2
0
PACNT1
0
PACNT0
0
0x0064–
0x006B
Reserved
OCPD
W
R
0x006C
0x006D
0x006E
0x006F
OCPD7
OCPD6
OCPD5
OCPD4
OCPD3
OCPD2
OCPD1
OCPD0
W
R
Reserved
PTPSR
W
R
PTPS7
0
PTPS6
0
PTPS5
0
PTPS4
0
PTPS3
0
PTPS2
0
PTPS1
0
PTPS0
0
W
R
Reserved
W
0x0070-0x009F Analog to Digital Converter 12-Bit 10-Channel (ATD) Map
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
R
W
R
0
0
0
0
0x0070
ATDCTL0
WRAP3
WRAP2
WRAP1
WRAP0
ETRIG
SEL
ETRIG
CH3
ETRIG
CH2
ETRIG
CH1
ETRIG
CH0
0x0071
0x0072
0x0073
0x0074
0x0075
0x0076
0x0077
ATDCTL1
ATDCTL2
ATDCTL3
ATDCTL4
ATDCTL5
ATDSTAT0
Reserved
SRES1
AFFC
S8C
SRES0
SMP_DIS
W
R
0
ICLKSTP ETRIGLE ETRIGP
ETRIGE
FIFO
ASCIE
FRZ1
PRS1
ACMPIE
FRZ0
W
R
DJM
S4C
S2C
PRS4
MULT
S1C
W
R
SMP2
0
SMP1
SMP0
SCAN
PRS3
PRS2
PRS0
W
R
SC
0
CD
CC
CB
CA
W
R
CC3
CC2
CC1
CC0
SCF
0
ETORF
0
FIFOR
0
W
R
0
0
0
0
0
0
0
0
W
R
0
0
0
0x0078 ATDCMPEH
0x0079 ATDCMPEL
CMPE[9:8]
W
R
CMPE[7:0]
W
R
CCF[9:8]
IEN[9:8]
0x007A ATDSTAT2H
0x007B ATDSTAT2L
W
R
CCF[7:0]
IEN[7:0]
W
R
0
0
0
0
0
0
0x007C
0x007D
ATDDIENH
ATDDIENL
W
R
W
S12P-Family Reference Manual, Rev. 1.13
Freescale Semiconductor
551
FREESCALE [ Freescale ]
