Device Overview MC9S12P-Family
1.7.3
Detailed Signal Descriptions
1.7.3.1
EXTAL, XTAL — Oscillator Pins
EXTAL and XTAL are the crystal driver and external clock pins. On reset all the device clocks are derived
from the internal reference clock. XTAL is the oscillator output.
1.7.3.2
RESET — External Reset Pin
The RESET pin is an active low bidirectional control signal. It acts as an input to initialize the MCU to a
known start-up state, and an output when an internal MCU function causes a reset. The RESET pin has an
internal pull-up device.
1.7.3.3
TEST — Test Pin
This input only pin is reserved for factory test. This pin has an internal pull-down device.
NOTE
The TEST pin must be tied to V
in all applications.
SSX
1.7.3.4
BKGD / MODC — Background Debug and Mode Pin
The BKGD/MODC pin is used as a pseudo-open-drain pin for the background debug communication. It
is used as a MCU operating mode select pin during reset. The state of this pin is latched to the MODC bit
at the rising edge of RESET. The BKGD pin has an internal pull-up device.
1.7.3.5
PAD[9:0] / AN[9:0] — Port AD Input Pins of ATD
PAD[9:0] are general-purpose input or output pins and analog inputs AN[9:0] of the analog-to-digital
converter ATD.
1.7.3.6
PA[7:0] — Port A I/O Pins
PA[7:0] are general-purpose input or output pins.
1.7.3.7
PB[7:0] — Port B I/O Pins
PB[7:0] are general-purpose input or output pins.
1.7.3.8
PE7 — Port E I/O Pin 7 / ECLKX2
PE7 is a general-purpose input or output pin. An internal pull-up is enabled during reset. It can be
configured to output ECLKX2.
1.7.3.9
PE[6:5] — Port E I/O Pin 6-5
PE[6:5] are a general-purpose input or output pins.
S12P-Family Reference Manual, Rev. 1.13
38
Freescale Semiconductor
FREESCALE [ Freescale ]
