(1)
Table 1-8. Pin-Out Summary
Internal Pull
Resistor
Package Pin
Function
Power
Description
Supply
QFP
80
LQFP
64
QFN
48
2nd
Func.
3rd
Func.
Reset
State
Pin
CTRL
53
54
55
56
57
58
41
42
43
44
45
46
30
31
32
33
34
35
PAD02
AN02
AN03
AN04
AN05
AN06
AN07
—
—
—
—
—
—
VDDA
VDDA
VDDA
VDDA
VDDA
VDDA
PER1AD
Disabled Port AD I/O,
analog input of ATD
PAD03
PAD04
PAD05
PAD06
PAD07
PER1AD
PER1AD
PER1AD
PER1AD
PER1AD
Disabled Port AD I/O,
analog input of ATD
Disabled Port AD I/O,
analog input of ATD
Disabled Port AD I/O,
analog input of ATD
Disabled Port AD I/O,
analog input of ATD
Disabled Port AD I/O,
analog input of ATD
59
60
61
62
63
64
65
66
67
68
69
70
47
48
49
49
50
51
52
53
54
-
36
36
37
37
38
39
-
VDDA
VRH(2)
VRL(3)
VSSA
PS0
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
RXD
TXD
VDDX
VDDX
VDDX
VDDX
N.A.
PERS/PPSS
PERS/PPSS
PERS/PPSS
PERS/PPSS
RESET pin
PERJ/PPSJ
PERJ/PPSJ
Up
Port S I/O, RXD of SCI
Port S I/O, TXD of SCI
Port S I/O
PS1
Up
PS2
Up
-
PS3
Up
Port S I/O
40
-
TEST
PJ7
—
DOWN
Up
Test input
KWJ7
KWJ6
SCK
VDDX
VDDX
VDDX
Port J I/O, interrupt
Port J I/O, interrupt
-
-
PJ6
Up
55
41
PM5
PERM/PPSM Disabled Port M I/O, MISO of SPI