Serial Communication Interface (S12SCIV5)
Table 11-4. SCICR1 Field Descriptions
Description
Field
7
Loop Select Bit — LOOPS enables loop operation. In loop operation, the RXD pin is disconnected from the SCI
and the transmitter output is internally connected to the receiver input. Both the transmitter and the receiver must
be enabled to use the loop function.
LOOPS
0 Normal operation enabled
1 Loop operation enabled
The receiver input is determined by the RSRC bit.
6
SCI Stop in Wait Mode Bit — SCISWAI disables the SCI in wait mode.
SCISWAI 0 SCI enabled in wait mode
1 SCI disabled in wait mode
5
Receiver Source Bit — When LOOPS = 1, the RSRC bit determines the source for the receiver shift register
RSRC
input. See Table 11-5.
0 Receiver input internally connected to transmitter output
1 Receiver input connected externally to transmitter
4
M
Data Format Mode Bit — MODE determines whether data characters are eight or nine bits long.
0 One start bit, eight data bits, one stop bit
1 One start bit, nine data bits, one stop bit
3
Wakeup Condition Bit — WAKE determines which condition wakes up the SCI: a logic 1 (address mark) in the
WAKE
most significant bit position of a received data character or an idle condition on the RXD pin.
0 Idle line wakeup
1 Address mark wakeup
2
ILT
Idle Line Type Bit — ILT determines when the receiver starts counting logic 1s as idle character bits. The
counting begins either after the start bit or after the stop bit. If the count begins after the start bit, then a string of
logic 1s preceding the stop bit may cause false recognition of an idle character. Beginning the count after the
stop bit avoids false idle character recognition, but requires properly synchronized transmissions.
0 Idle character bit count begins after start bit
1 Idle character bit count begins after stop bit
1
Parity Enable Bit — PE enables the parity function. When enabled, the parity function inserts a parity bit in the
PE
most significant bit position.
0 Parity function disabled
1 Parity function enabled
0
Parity Type Bit — PT determines whether the SCI generates and checks for even parity or odd parity. With even
PT
parity, an even number of 1s clears the parity bit and an odd number of 1s sets the parity bit. With odd parity, an
odd number of 1s clears the parity bit and an even number of 1s sets the parity bit.
1 Even parity
1 Odd parity
Table 11-5. Loop Functions
LOOPS
RSRC
Function
0
1
1
x
0
1
Normal operation
Loop mode with transmitter output internally connected to receiver input
Single-wire mode with TXD pin connected to receiver input
S12P-Family Reference Manual, Rev. 1.13
Freescale Semiconductor
369
FREESCALE [ Freescale ]
