(1)
Table 1-8. Pin-Out Summary
Internal Pull
Resistor
Package Pin
Function
Power
Description
Supply
QFP
80
LQFP
64
QFN
48
2nd
Func.
3rd
Func.
Reset
State
Pin
CTRL
1
2
3
4
1
2
3
4
1
2
3
-
PP3
KWP3
KWP2
KWP1
KWP0
PWM3
PWM2
PWM1
PWM0
VDDX
VDDX
VDDX
VDDX
PERP/PPSP
Disabled Port P I/O, interrupt,
PWM channel
PP2
PP1
PP0
PERP/PPSP
PERP/PPSP
PERP/PPSP
Disabled Port P I/O, interrupt,
PWM channel
Disabled Port P I/O, interrupt,
PWM channel
Disabled Port P I/O, interrupt,
PWM/ channel
5
6
5
6
4
5
6
7
-
PT0
PT1
PT2
PT3
PJ0
PJ1
PT4
IOC0
IOC1
IOC2
IOC3
KWJ0
KWJ1
IOC4
PWM0
—
VDDX
VDDX
VDDX
VDDX
VDDX
VDDX
VDDX
PERT/PPST
PERT/PPST
PERT/PPST
PERT/PPST
PERJ/PPSJ
PERJ/PPSJ
PERT/PPST
Disabled Port T I/O, TIM channel
Disabled Port T I/O, TIM channel
Disabled Port T I/O, TIM channel
Disabled Port T I/O, TIM channel
7
7
—
8
8
—
9
9
—
Up
Up
Port J I/O, interrupt
Port J I/O, interrupt
10
11
10
11
-
—
8
PWM4
Disabled Port T I/O, PWM/TIM
channel
12
12
9
PT5
IOC5
PWM5
or
VDDX
PERT/PPST
Disabled Port T I/O, PWM/TIM
channel, API output
API_EX
TCLK
13
14
15
13
14
15
10
11
12
PT6
PT7
IOC6
IOC7
VDDX
VDDX
VDDX
PERT/PPST
PERT/PPST
Always on
Disabled Port T I/O, channel of
TIM
Disabled Port T I/O, channel of
TIM
BKGD
MODC
—
Up
Background debug
FREESCALE [ Freescale ]
