Pulse-Width Modulator (PWM8B6CV1) Block Description
Module Base + 0x0012
7
6
5
4
3
2
1
0
R
W
Bit 7
6
5
4
3
2
1
Bit 0
Reset
0
0
0
0
0
0
0
0
Figure 10-21. PWM Channel Period Registers (PWMPER0)
Module Base + 0x0013
7
6
5
4
3
2
1
0
R
Bit 7
W
6
5
4
3
2
1
Bit 0
Reset
0
0
0
0
0
0
0
0
Figure 10-22. PWM Channel Period Registers (PWMPER1)
Module Base + 0x0014
7
6
5
4
3
2
1
0
R
Bit 7
W
6
5
4
3
2
1
Bit 0
Reset
0
0
0
0
0
0
0
0
Figure 10-23. PWM Channel Period Registers (PWMPER2)
Module Base + 0x0015
7
6
5
4
3
2
1
0
R
Bit 7
W
6
5
4
3
2
1
Bit 0
Reset
0
0
0
0
0
0
0
0
Figure 10-24. PWM Channel Period Registers (PWMPER3)
Module Base + 0x0016
7
6
5
4
3
2
1
0
R
Bit 7
W
6
5
4
3
2
1
Bit 0
Reset
0
0
0
0
0
0
0
0
Figure 10-25. PWM Channel Period Registers (PWMPER4)
S12P-Family Reference Manual, Rev. 1.13
348
Freescale Semiconductor