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MC9S12P64CFT 参数 Datasheet PDF下载

MC9S12P64CFT图片预览
型号: MC9S12P64CFT
PDF下载: 下载PDF文件 查看货源
内容描述: 微控制器 [Microcontrollers]
分类和应用: 微控制器外围集成电路时钟
文件页数/大小: 566 页 / 7414 K
品牌: FREESCALE [ Freescale ]
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S12 Clock, Reset and Power Management Unit (S12CPMU)  
7.4.5.2  
The Adaptive Oscillator Filter  
A spike in the oscillator clock can disturb the function of the modules driven by this clock.  
The adaptive Oscillator Filter includes two features:  
1. Filter noise (spikes) from the incoming external oscillator clock. The filter function is illustrated in  
Figure 7-35.  
Figure 7-35. Noise filtered by the Adaptive Oscillator Filter  
enable external oscillator  
OSCE  
configure the Oscillator Filter  
OSC  
0
> 0  
FILT  
crystal/resonator starts oscillating  
EXTAL  
LOCK  
UPOSC  
filtered  
filtered  
OSCCLK  
(filtered)  
2. Detect severe noise disturbances on the external oscillator clock, which can not be filtered and  
indicate the critical situation to the software by clearing the UPOSC and LOCK status bit and  
setting the OSCIF and LOCKIF flag. An example for the detection of critical noise is illustrated in  
Figure 7-36.  
Figure 7-36. Critical noise detected by the Adaptive Oscillator Filter  
enable external oscillator  
OSCE  
configure the Oscillator Filter  
OSC  
0
> 0  
FILT  
crystal/resonator starts oscillating  
phase shift can not be filtered but detected  
EXTAL  
LOCK  
UPOSC  
OSCCLK  
(filtered)  
NOTE  
If the LOCK bit is clear due to severe noise disturbance on the external  
oscillator clock the PLLCLK is derived from the VCO clock (with its actual  
frequency) divided by four (see also Section 7.3.2.3, “S12CPMU Post  
Divider Register (CPMUPOSTDIV))  
S12P-Family Reference Manual, Rev. 1.13  
242  
Freescale Semiconductor  
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