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MC908AP32CFAE 参数 Datasheet PDF下载

MC908AP32CFAE图片预览
型号: MC908AP32CFAE
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内容描述: [MC908AP32CFAE]
分类和应用:
文件页数/大小: 325 页 / 4102 K
品牌: FREESCALE [ Freescale ]
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Keyboard Interrupt Registers  
If the MODEK bit is clear, the keyboard interrupt pin is falling-edge-sensitive only. With MODEK clear, a  
vector fetch or software clear immediately clears the keyboard interrupt request.  
Reset clears the keyboard interrupt request and the MODEK bit, clearing the interrupt request even if a  
keyboard interrupt pin stays at logic 0.  
The keyboard flag bit (KEYF) in the keyboard status and control register can be used to see if a pending  
interrupt exists. The KEYF bit is not affected by the keyboard interrupt mask bit (IMASKK) which makes  
it useful in applications where polling is preferred.  
To determine the logic level on a keyboard interrupt pin, use the data direction register to configure the  
pin as an input and read the data register.  
NOTE  
Setting a keyboard interrupt enable bit (KBIEx) forces the corresponding  
keyboard interrupt pin to be an input, overriding the data direction register.  
However, the data direction register bit must be a logic 0 for software to  
read the pin.  
18.4.1 Keyboard Initialization  
When a keyboard interrupt pin is enabled, it takes time for the internal pull-up to reach a logic 1. Therefore  
a false interrupt can occur as soon as the pin is enabled.  
To prevent a false interrupt on keyboard initialization:  
1. Mask keyboard interrupts by setting the IMASKK bit in the keyboard status and control register.  
2. Enable the KBI pins by setting the appropriate KBIEx bits in the keyboard interrupt enable register.  
3. Write to the ACKK bit in the keyboard status and control register to clear any false interrupts.  
4. Clear the IMASKK bit.  
An interrupt signal on an edge-triggered pin can be acknowledged immediately after enabling the pin. An  
interrupt signal on an edge- and level-triggered interrupt pin must be acknowledged after a delay that  
depends on the external load.  
Another way to avoid a false interrupt:  
1. Configure the keyboard pins as outputs by setting the appropriate DDR bits in data direction  
register.  
2. Write logic 1s to the appropriate data register bits.  
3. Enable the KBI pins by setting the appropriate KBIEx bits in the keyboard interrupt enable register.  
18.5 Keyboard Interrupt Registers  
Two registers control the operation of the keyboard interrupt module:  
Keyboard Status and Control Register — $001A  
Keyboard Interrupt Enable Register — $001B  
18.5.1 Keyboard Status and Control Register  
Flags keyboard interrupt requests  
Acknowledges keyboard interrupt requests  
Masks keyboard interrupt requests  
Controls keyboard interrupt triggering sensitivity  
MC68HC908AP Family Data Sheet, Rev. 4  
Freescale Semiconductor  
279  
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