Keyboard Interrupt Module (KBI)
18.4 Functional Description
INTERNAL BUS
VECTOR FETCH
DECODER
KBI0
ACKK
V
DD
KEYF
RESET
CLR
.
D
Q
SYNCHRONIZER
Keyboard
Interrupt
Request
KBIE0
.
CK
TO PULLUP ENABLE
.
KEYBOARD
INTERRUPT FF
IMASKK
KBI7
MODEK
KBIE7
TO PULLUP ENABLE
Figure 18-2. Keyboard Interrupt Block Diagram
Writing to the KBIE7–KBIE0 bits in the keyboard interrupt enable register independently enables or
disables each port D pin as a keyboard interrupt pin. Enabling a keyboard interrupt pin in port D also
enables its internal pull-up device. A logic 0 applied to an enabled keyboard interrupt pin latches a
keyboard interrupt request.
A keyboard interrupt is latched when one or more keyboard pins goes low after all were high. The MODEK
bit in the keyboard status and control register controls the triggering mode of the keyboard interrupt.
•
If the keyboard interrupt is edge-sensitive only, a falling edge on a keyboard pin does not latch an
interrupt request if another keyboard pin is already low. To prevent losing an interrupt request on
one pin because another pin is still low, software can disable the latter pin while it is low.
If the keyboard interrupt is falling edge- and low level-sensitive, an interrupt request is present as
long as any keyboard pin is low.
•
If the MODEK bit is set, the keyboard interrupt pins are both falling edge- and low level-sensitive, and both
of the following actions must occur to clear a keyboard interrupt request:
•
Vector fetch or software clear — A vector fetch generates an interrupt acknowledge signal to clear
the interrupt request. Software may generate the interrupt acknowledge signal by writing a logic 1
to the ACKK bit in the keyboard status and control register KBSCR. The ACKK bit is useful in
applications that poll the keyboard interrupt pins and require software to clear the keyboard
interrupt request. Writing to the ACKK bit prior to leaving an interrupt service routine can also
prevent spurious interrupts due to noise. Setting ACKK does not affect subsequent transitions on
the keyboard interrupt pins. A falling edge that occurs after writing to the ACKK bit latches another
interrupt request. If the keyboard interrupt mask bit, IMASKK, is clear, the CPU loads the program
counter with the vector address at locations $FFE0 and $FFE1.
•
Return of all enabled keyboard interrupt pins to logic 1 — As long as any enabled keyboard
interrupt pin is at logic 0, the keyboard interrupt remains set.
The vector fetch or software clear and the return of all enabled keyboard interrupt pins to logic 1 may
occur in any order.
MC68HC908AP Family Data Sheet, Rev. 4
278
Freescale Semiconductor
FREESCALE [ Freescale ]
