Freescale Semiconductor, Inc.
Low-Power Modes
Wait Mode
6.3.4 Non-Programmable COP Watchdog in Stop Mode
The STOP instruction has these effects on the non-programmable COP
watchdog:
• Turns off the oscillator and the COP watchdog counter
• Clears the COP watchdog counter
If the RESET pin brings the MCU out of stop mode, the COP watchdog
begins counting immediately. The reset function clears the COP counter
again after the 4064-tCYC clock stabilization delay.
If the IRQ pin brings the MCU out of stop mode, the COP watchdog
begins counting immediately. The IRQ function does not clear the
COP counter again after the 4064-tCYC clock stabilization delay. See
Figure 6-3.
NOTE: If the clock monitor is enabled (CME = 1), the STOP instruction causes
it to time out and reset the MCU.
6.4 Wait Mode
The WAIT instruction places the MCU in an intermediate power
consumption mode. All central processor unit (CPU) activity is
suspended, but the oscillator, capture/compare timer, SCI, and SPI
remain active. Any interrupt or reset brings the MCU out of wait mode.
See Figure 6-1.
The WAIT instruction has these effects on the CPU:
• Clears the I bit in the condition code register, enabling interrupts
• Stops the CPU clock, but allows the internal clock to drive the
capture/compare timer, SCI, and SPI
The WAIT instruction does not affect any other registers or I/O lines. The
capture/compare timer, SCI, and SPI can be enabled to allow a periodic
exit from wait mode.
MC68HC705C8A — Rev. 3
MOTOROLA
Technical Data
Low-Power Modes
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