Freescale Semiconductor, Inc.
Low-Power Modes
NOTE: If the clock monitor is enabled (CME = 1), the STOP instruction causes
the clock monitor to time out and reset the MCU.
STOP
CLEAR I BIT IN CCR
TURN OFF INTERNAL OSCILLATOR
SUSPEND COP COUNTER
YES
EXTERNAL
RESET?
NO
NO
EXTERNAL
INTERRUPT?
TURN ON INTERNAL OSCILLATOR
CLEAR COP COUNTER
CLEAR PCOPE BIT IN COPCR
YES
TURN ON INTERNAL OSCILLATOR
END OF
STABILIZATION
DELAY?
YES
NO
YES
END OF
STABILIZATION
DELAY?
NO
TURN ON INTERNAL CLOCK
TURN ON INTERNAL CLOCK
RESUME COP WATCHDOG COUNT
1. LOAD PC WITH RESET VECTOR
OR
2. SERVICE INTERRUPT:
a. SAVE CPU REGISTERS ON STACK
b. SET I BIT IN CCR
c. LOAD PC WITH INTERRUPT VECTOR
1. LOAD PC WITH RESET VECTOR
OR
2. SERVICE INTERRUPT:
a. SAVE CPU REGISTERS ON STACK
b. SET I BIT IN CCR
c. LOAD PC WITH INTERRUPT VECTOR
Figure 6-2. Programmable COP Watchdog
in Stop Mode (PCOPE = 1) Flowchart
Technical Data
72
MC68HC705C8A — Rev. 3
Low-Power Modes
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