Freescale Semiconductor, Inc.
Interrupts
Interrupt Processing
FROM
RESET
I BIT IN
CCR REGISTER
SET?
YES
NO
EXTERNAL
IRQ
INTERRUPT?
YES
YES
CLEAR IRQ REQUEST LATCH
NO
TIMER
INTERRUPT?
NO
YES
YES
SCI
INTERRUPT?
NO
SPI
INTERRUPT?
NO
1. STACK PC, X, A, CCR
2. SET I BIT
3. LOAD PC WITH VECTOR
SWI: $1FFC–$1FFD
IRQ: $1FFA–$1FFB
TIMER: $1FF8–$1FF9
SCI: $1FF6–$1FF7
SPI: $1FF4–$1FF5
FETCH NEXT
INSTRUCTION
YES
YES
SWI
INSTRUCTION?
NO
RTI
INSTRUCTION?
RESTORE REGISTERS FROM STACK:
CCR, A, X, PC
NO
EXECUTE INSTRUCTION
Figure 4-5. Reset and Interrupt Processing Flowchart
MC68HC705C8A — Rev. 3
MOTOROLA
Technical Data
Interrupts
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