Freescale Semiconductor, Inc.
Ele c tric a l Sp e c ific a tions
(1)
(2)
Symbol
Min
Max
Unit
Number
Characteristic
Data hold time (outputs)
t
t
11
Master (after capture edge)
Slave (after enable edge)
0.25
0
—
—
HO(M)
CYC(M)
t
ns
HO(S)
(7)
Rise time
t
12
13
—
—
200
2.0
ns
µs
R(M)
SPI outputs (SCK, MOSI, MISO)
SPI inputs (SCK, MOSI, MISO, SS)
t
R(S)
(8)
Fall time
t
—
—
200
2.0
ns
µs
F(M)
SPI outputs (SCK, MOSI, MISO)
SPI inputs (SCK, MOSI, MISO, SS)
t
F(S)
1. Numbers refer to dimensions in Figure 13-8 and Figure 13-9.
2. V = 3.3 Vdc ± 10%
3. SDigDnal production depends on software.
4. Time to data active from high-impedance state
5. Hold time to high-impedance state
6. With 200 pF on all SPI pins
7. 20% of V to 70% of V ; C = 200 pF
DD
DD
L
8. 70% of V to 20% of V ; C = 200 pF
DD
DD
L
Technical Data
188
MC68HC705C8A — Rev. 3
Electrical Specifications
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