Freescale Semiconductor, Inc.
Serial Peripheral Interface (SPI)
Features
INTERNAL
CLOCK
(XTAL ÷2)
S
PD2/
MISO
M
M
S
SPI SHIFT REGISTER
7
6 5 4 3 2
1
0
PD3/
MOSI
C
DIVIDER
÷2
÷4
÷6 ÷32
SHIFT
CLOCK
PD4/
SCK
SPDR ($000C)
T
C
SPI CLOCK (MASTER)
N
P
SELECT
M
S
CLOCK
LOGIC
PD5/
SS
1
0
R
S
S
MSTR
SPE
SPIE
MSTR
SPE
SPI CONTROL
DWOM
SPCR ($000A)
SPSR ($000B)
SPI INTERRUPT
REQUEST
INTERNAL
DATA BUS
Figure 11-1. SPI Block Diagram
MC68HC705C8A — Rev. 3
MOTOROLA
Technical Data
Serial Peripheral Interface (SPI)
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