Freescale Semiconductor, Inc.
Configuration Register (CONFIG-1)
The bit in the CONFIG register or MOR (mask option register) used to
control the short and long COP timeout has some variation within the
A-Family of devices. Table 11-1 is intended to clarify bit 2 within the
CONFIG or MOR of a FLASH or ROM device, respectively.
Table 11-1. COP Time Clarification
Register/Bit
Location
Bit
Name
Device
Value
Definition
1
0
1
0
1
0
1
0
Short COP timeout
Long COP timeout
Short COP timeout
Long COP timeout
Short COP timeout
Long COP timeout
Short COP timeout
Long COP timeout
MC68HC908AS60
CONFIG-1/bit 2
CONFIG-1/bit 2
MOR/bit 2
COPL
COPL
MC68HC908AZ60
MC68HC08AS32
COPRS
COPL
MC68HC08AS20
Definition:
MOR/bit 2
Short COP timeout: 8,176 CGMXCLK cycles
Long COP timeout: 262,128 CGMXCLK cycles
CGMXCLK is the output of the crystal oscillator circuit and runs at a rate equal to the
crystal frequency.
Technical Data
MC68HC908AS60 — Rev. 1.0
Configuration Register (CONFIG-1)
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