Freescale Semiconductor, Inc.
System Integration Module (SIM)
Interrupts are latched, and arbitration is performed in the SIM at the start
of interrupt processing. The arbitration result is a constant that the CPU
uses to determine which vector to fetch. Once an interrupt is latched by
the SIM, no other interrupt can take precedence, regardless of priority,
until the latched interrupt is serviced (or the I bit is cleared).
See Figure 9-10.
MODULE
INTERRUPT
I BIT
IAB
DUMMY
SP
SP – 1
SP – 2
SP – 3
SP – 4
VECT H
VECT L START ADDR
IDB
DUMMY
PC –1[7:0] PC–1[15:8]
X
A
CCR
V DATA H V DATA L OPCODE
R/W
Figure 9-8. Interrupt Entry
MODULE
INTERRUPT
I BIT
IAB
SP – 4
SP – 3
SP – 2
SP – 1
SP
PC
PC + 1
IDB
CCR
A
X
PC – 1 [7:0] PC–1[15:8] OPCODE OPERAND
R/W
Figure 9-9. Interrupt Recovery
Technical Data
MC68HC908AS60 — Rev. 1.0
System Integration Module (SIM)
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