CPM Electrical Characteristics
SMCLK
152
152
151
151
150
SMTXD
(Output)
NOTE
154
153
155
SMSYNC
154
155
SMRXD
(Input)
NOTE:
1. This delay is equal to an integer number of character-length clocks.
Figure 58. SMC Transparent Timing Diagram
13.9 SPI Master AC Electrical Specifications
Table 26 provides the SPI master timings as shown in Figure 59 and Figure 60.
Table 26. SPI Master Timing
All
Frequencies
Num
Characteristic
Unit
Min
Max
160 MASTER cycle time
4
2
1024
512
—
tcyc
tcyc
ns
ns
ns
ns
ns
ns
161 MASTER clock (SCK) high or low time
162 MASTER data setup time (inputs)
163 Master data hold time (inputs)
164 Master data valid (after SCK edge)
165 Master data hold time (outputs)
166 Rise time output
15
0
—
—
0
10
—
—
—
15
167 Fall time output
15
MPC875/MPC870 Hardware Specifications, Rev. 3.0
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
62
Freescale Semiconductor
FREESCALE [ Freescale ]
