CPM Electrical Characteristics
13.10SPI Slave AC Electrical Specifications
Table 27 provides the SPI slave timings as shown in Figure 61 and Figure 62.
Table 27. SPI Slave Timing
All
Frequencies
Num
Characteristic
Unit
Min
Max
170 Slave cycle time
2
—
—
—
—
—
—
—
50
tcyc
ns
171 Slave enable lead time
172 Slave enable lag time
15
15
1
ns
173 Slave clock (SPICLK) high or low time
174 Slave sequential transfer delay (does not require deselect)
175 Slave data setup time (inputs)
tcyc
tcyc
ns
1
20
20
—
176 Slave data hold time (inputs)
ns
177 Slave access time
ns
SPISEL
(Input)
172
171
174
SPICLK
(CI=0)
(Input)
173
182
181
181
182
173
170
SPICLK
(CI=1)
(Input)
177
180
Data
179
178
Undef
SPIMISO
(Output)
msb
lsb
msb
175
176
msb
181 182
lsb
SPIMOSI
(Input)
Data
msb
Figure 61. SPI Slave (CP = 0) Timing Diagram
MPC875/MPC870 Hardware Specifications, Rev. 3.0
64
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
Freescale Semiconductor
FREESCALE [ Freescale ]
