Mandatory Reset Configurations
VDDH
VDDL
MUR420
1N5820
Figure 3. Example Voltage Sequencing Circuit
9 Mandatory Reset Configurations
The MPC875/870 requires a mandatory configuration during reset.
If hardware reset configuration word (HRCW) is enabled, the HRCW[DBGC] value needs to be set to binary X1 in
the HRCW and the SIUMCR[DBGC] should be programmed with the same value in the boot code after reset. This
can be done by asserting the RSTCONF during HRESET assertion.
If HRCW is disabled, the SIUMCR[DBGC] should be programmed with binary X1 in the boot code after reset by
negating the RSTCONF during the HRESET assertion.
The MBMR[GPLB4DIS], PAPAR, PADIR, PBPAR, PBDIR, PCPAR, and PCDIR need to be configured with the
mandatory values in Table 7 in the boot code after the reset is negated.
Table 7. Mandatory Reset Configuration of MPC875/870
Value
(binary)
Register/Configuration
Field
HRCW
HRCW[DBGC]
X1
(Hardware reset configuration word)
SIUMCR
(SIU module configuration register)
SIUMCR[DBGC]
X1
0
MBMR
MBMR[GPLB4DIS}
(Machine B mode register)
PAPAR
PAPAR[5:9]
0
(Port A pin assignment register)
PAPAR[12:13]
PADIR
PADIR[5:9]
0
(Port A data direction register)
PADIR[12:13]
PBPAR
PBPAR[14:18]
PBPAR[20:22]
0
(Port B pin assignment register)
PBDIR
PBDIR[14:8]
0
(Port B data direction register)
PBDIR[20:22]
PCPAR
PCPAR[4:5]
PCPAR[8:9]
PCPAR[14]
0
(Port C pin assignment register)
MPC875/MPC870 Hardware Specifications, Rev. 3.0
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
14
Freescale Semiconductor
FREESCALE [ Freescale ]
