Overview
2
•
Serial Audio Interface I(ESAI_1): up to 4 receivers and up to 6 transmitters, master or slave. I S,
Sony, AC97, network and other programmable protocols
The ESAI_1 shares four of the data pins with ESAI, and ESAI_1 does NOT support HCKR and
HCKT (high frequency clocks)
2
•
Serial Host Interface (SHI): SPI and I C protocols, multi master capability, 10-word receive FIFO,
support for 8, 16 and 24-bit words.
•
•
•
Byte-wide parallel Host Interface (HDI08) with DMA support.
Triple Timer module (TEC).
Digital Audio Transmitter (DAX): 1 serial transmitter capable of supporting the SPDIF, IEC958,
CP-340 and AES/EBU digital audio formats.
•
1.6
1.7
Pins of unused peripherals (except SHI) may be programmed as GPIO lines.
144-pin plastic LQFP package
Documentation
Table 1-1 lists the documents that provide a complete description of the DSP56367 and are required to
design properly with the part. Documentation is available from a local Freescale distributor, a Freescale
semiconductor sales office, a Freescale Literature Distribution Center, or through the Freescale DSP home
page on the Internet (the source for the latest information).
Table 1-1 DSP56367 Documentation
Document Name
Description
Order Number
DSP56300 Family Manual
Detailed description of the 56000-family architecture
and the 24-bit core processor and instruction set
DSP56300FM
DSP56367 Product Brief
DSP56367 User’s Manual
Brief description of the chip
DSP56367 User’s Manual
DSP56367P
DSP56367UM
DSP56367
DSP56367 Technical Data Sheet
(this document)
Electrical and timing specifications; pin and package
descriptions
IBIS Model
Input Output Buffer Information Specification
For software or simulation
models, contact sales or
go to www.freescale.com.
DSP56367 Technical Data, Rev. 2.1
1-4
Freescale Semiconductor
FREESCALE [ Freescale ]
