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DSPB56367AG150 参数 Datasheet PDF下载

DSPB56367AG150图片预览
型号: DSPB56367AG150
PDF下载: 下载PDF文件 查看货源
内容描述: 24位音频数字信号处理器 [24-Bit Audio Digital Signal Processor]
分类和应用: 外围集成电路数字信号处理器时钟
文件页数/大小: 100 页 / 1082 K
品牌: FREESCALE [ Freescale ]
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SPDIF Transmitter Digital Audio Interface  
2.14 SPDIF Transmitter Digital Audio Interface  
Table 2-13 Digital Audio Interface (DAX) Signals  
Signal  
Name  
State During  
Reset  
Type  
Signal Description  
ACI  
Input  
GPIO  
Audio Clock Input—This is the DAX clock input. When programmed to use  
Disconnected an external clock, this input supplies the DAX clock. The external clock  
frequency must be 256, 384, or 512 times the audio sampling frequency  
(256 × Fs, 384 × Fs or 512 × Fs, respectively).  
PD0  
Input, Output, or  
Disconnected  
Port D 0—When the DAX is configured as GPIO, this signal is individually  
programmable as input, output, or internally disconnected.  
The default state after reset is GPIO disconnected.  
This input is 3.3V tolerant.  
ADO  
PD1  
Output  
GPIO  
Digital Audio Data Output—This signal is an audio and non-audio output in  
Disconnected the form of AES/EBU, CP340 and IEC958 data in a biphase mark format.  
Input, Output, or  
Disconnected  
Port D 1—When the DAX is configured as GPIO, this signal is individually  
programmable as input, output, or internally disconnected.  
The default state after reset is GPIO disconnected.  
This input is 3.3V tolerant.  
2.15 Timer  
Table 2-14 Timer Signal  
Signal  
Name  
State during  
Signal Description  
Reset  
Type  
Input or Output  
TIO0  
Input  
Timer 0 Schmitt-Trigger Input/Output—When timer 0 functions as an  
external event counter or in measurement mode, TIO0 is used as input. When  
timer 0 functions in watchdog, timer, or pulse modulation mode, TIO0 is used  
as output.  
The default mode after reset is GPIO input. This can be changed to output or  
configured as a timer input/output through the timer 0 control/status register  
(TCSR0). If TIO0 is not being used, it is recommended to either define it as  
GPIO output immediately at the beginning of operation or leave it defined as  
GPIO input but connected to Vcc through a pull-up resistor in order to ensure  
a stable logic level at this input.  
This input is 3.3 V tolerant.  
DSP56367 Technical Data, Rev. 2.1  
2-18  
Freescale Semiconductor  
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