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C5EC3EARCH-RM/D 参数 Datasheet PDF下载

C5EC3EARCH-RM/D图片预览
型号: C5EC3EARCH-RM/D
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内容描述: C- 3E网络处理器芯片版本A1 [C-3e NETWORK PROCESSOR SILICON REVISION A1]
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文件页数/大小: 114 页 / 2056 K
品牌: FREESCALE [ Freescale ]
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78  
CHAPTER 3: ELECTRICAL SPECIFICATIONS  
θjc is the junction-to-case thermal resistance  
θint is the adhesive or interface material thermal resistance  
θsa is the heat sink base-to-ambient thermal resistance  
P d is the power dissipated by the device  
During operation, the die-junction temperatures (T j ) should be maintained less than the  
value specified in Table 36. The temperature of the air cooling the component greatly  
depends upon the ambient inlet air temperature and the air temperature rise within the  
electronic cabinet. An electronic cabinet inlet-air temperature (T a ) may range from 30° to  
40°C. The air temperature rise within a cabinet (T r ) may be in the range of 5° to 10°C. The  
thermal resistance of the thermal interface material (θint ) is typically about 1.5°C/W. For  
example, assuming a T a of 30°C, a T r of 5°C, a CBGA package θjc = 0.1, and a maximum  
power consumption (P d ) of 7.5 W, the following expression for T j is obtained:  
Die-junction temperature: T j = 30°C + 5°C + (0.1°C/W + 1.5°C/W + θsa ) x 7.5 W  
For this example, a θsa value of 10.4°C/W or less is required to maintain the die junction  
temperature below the maximum value of Table 36.  
Though the die junction-to-ambient and the heat sink-to-ambient thermal resistances are  
a common figure-of-merit used for comparing the thermal performance of various  
microelectronic packaging technologies, one should exercise caution when only using  
this metric in determining thermal management because no single parameter can  
adequately describe three-dimensional heat flow. The final die-junction operating  
temperature is not only a function of the component-level thermal resistance, but the  
system-level design and its operating conditions. In addition to the component's power  
consumption, a number of factors affect the final operating die-junction  
temperatureairflow, board population (local heat flux of adjacent components), heat  
sink efficiency, heat sink attach, heat sink placement, next-level interconnect technology,  
system air temperature rise, altitude, etc.  
Due to the complexity and the many variations of system-level boundary conditions for  
today's microelectronic equipment, the combined effects of the heat transfer  
mechanisms (radiation, convection,and conduction) may vary widely. For these reasons,  
we recommend using conjugate heat transfer models for the board, as well as  
system-level designs.  
C3EN  
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