34
CHAPTER 2: SIGNAL DESCRIPTIONS
Table 7 CP Physical Interface Signals and Pins (Grouped by Clusters) (continued)
CP CLUSTER 1 CP CLUSTER 2
SIGNAL
PIN #
AG22
AE22
SIGNAL
PIN #
AC17
AB17
CP3_5
CP3_6
CP7_5
CP7_6
DS1/T1 Framer Interface Configuration
Table 8 describes the serial framer interface signals. For each CP (0-7), you can implement
one serial Framer interface.
Table 8 DS1/T1 Framer Interface Signals
SIGNAL NAME*
CPn_0
PIN #†
TOTAL TYPE
I/O
OPD TCLK
IPU RCLK
LABEL
SIGNAL DESCRIPTION
Transmit Clock (1.544MHz)
Receive Clock (1.544MHz)
Transmit Data
Table 7
Table 7
Table 7
Table 7
Table 7
Table 7
Table 7
1
1
1
1
1
1
1
7
LVTTL
LVTTL
LVTTL
LVTTL
LVTTL
LVTTL
nc
CPn_1
CPn_2
OPD TData
CPn_3
OPU TFrame
Transmit Frame Synchronization
Receive Data
CPn_4
IPD
IPU
RData
CPn_5
RFrame
Receive Frame Synchronization
nc
CPn_6
ncPU nc
TOTAL PINS
*
n can be from 0 to 7. See Table 7.
Reference Table 7 for pin numbers for the actual cluster(s) you are configuring.
†
C3EN
FREESCALE [ Freescale ]
