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C5EC3EARCH-RM/D 参数 Datasheet PDF下载

C5EC3EARCH-RM/D图片预览
型号: C5EC3EARCH-RM/D
PDF下载: 下载PDF文件 查看货源
内容描述: C- 3E网络处理器芯片版本A1 [C-3e NETWORK PROCESSOR SILICON REVISION A1]
分类和应用:
文件页数/大小: 114 页 / 2056 K
品牌: FREESCALE [ Freescale ]
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CHAPTER 2: SIGNAL DESCRIPTIONS  
Pin Descriptions Grouped  
by Function  
The C-3e NP pins are categorized in groups, reflecting interfaces to the chip:  
Clock Signals  
CP Interface Signals  
Executive Processor System Interface Signals  
Fabric Processor Interface Signals  
BMU SDRAM Interface Signals  
TLU SRAM Interface Signals  
QMU SRAM (Internal Mode) Interface Signals  
QMU to Q-5/Q-3 (External Mode) Interface Signals  
Power Supply Signals  
Test Signals  
Pins conform to Joint Electronic Devices Engineering Council (JEDEC) standards.  
LVTTL and LVPECL C-3e NP pins are the following types:  
Specifications  
Low Voltage TTL-Compatible (LVTTL). The C-3e NPs LVTTL pins conform to the JEDEC  
JESD8-B specification.  
Low Voltage Positive Emitter Coupled Logic (LVPECL).  
All of the signals in the following tables in this chapter denote whether the individual  
signal is an Input (I), Output (O), both Input and Output (I/O), or power (P). In addition, a  
PU, PD, and nc are used. The PU indicates that an internal resistor will pullup the pad if  
left unconnected. PD indicates an internal pulldown resistor. NC means the pad is to be  
left unconnected.  
C3EN