Freescale Semiconductor, Inc.
AN2528/D
Detailed Function Description
Table 7. svmStd_top and svmStd_bottom Parameter RAM
Channel
Parameter 15 14 13 12 11 10 9 8 7 6 5
0
htB
HLtime_BT
1
2
bottom_chan_B
UA3
3
4
SQRT3
5
sync_presc_addr
6
7
0
LHtime_BB
HLtime_BB
1
2
T_copy
dec
3
T
4
5
prescaler
6
7
0
htC
HLtime_CT
1
bottom_chan_C
2
3
prsc_copy
4
5
6
7
0
LHtime_CB
1
HLtime_CB
min_ht
2
max_ht
3
4
DT
MPW
5
6
7
4
3
2
1
0
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Phase C
bottom channel
Phase C
top channel
Phase B
bottom channel
Phase B
top channel
Table 8. svmStd_top and svmStd_bottom parameter description
Parameter
Ualfa, Ubeta
T
prescaler
Format
Description
Parameters written by CPU
Stator Reference Voltage Vector
16-bit fractional
components
PWM period in number of TCR1
16-bit unsigned integer
TPU cycles
The number of PWM periods per
16-bit unsigned integer
reload of new values
Standard Space Vector Modulation TPU Function Set (svmStd)
9
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