Freescale Semiconductor, Inc.
AN2528/D
HL
LH_C5
- top
Phase A
- bottom
- top
Phase B
- bottom
- top
Phase C
flag0 = 1
- bottom
LH
flag0 = 0
INIT
HL
STOP
no reload yet
flag0 = 1
4th-time
LH_RLD
C1234
reload
3-times
HSR = 10
HSR = 11
Figure 4. svmStd_top and svmStd_bottom state diagram
Minimum Pulse Width
The TPU cannot generate PWM signals with duty cycle ratios very close to 0%
or 100%. The minimum pulse width that the TPU can be guaranteed to correctly
generate is determined by the TPU function itself and by the activity on the
other channels. When the TPU function is requested to generate a narrower
pulse a collision can occur. To prevent this, the parameter MPW (minimum
pulse width) is introduced. The TPU functions svmStd_top and svmStd_bottom
limit the narrowest generated pulse widths to MPW. The CPU program should
check, and limit, the maximum amplitude of the Stator Reference Voltage
Vector before decomposition to u , u components. The maximum amplitude of
á
â
the Stator Reference Voltage Vector should be less than
2(MPW + DT )
1 −
T
If this is not the case, the TPU function will start to limit the minimum pulse
widths to MPW to prevent a collision, and the duty cycle ratio traces will be
deformed as shown on Figure 5.
12
Standard Space Vector Modulation TPU Function Set (svmStd)
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