Freescale Semiconductor, Inc.
AN2528/D
Table 8. svmStd_top and svmStd_bottom parameter description
Parameter
Format
Description
Dead-time in number of TCR1
TPU cycles
DT
16-bit unsigned integer
Minimum pulse width in number of
TCR1 TPU cycles. See
Performance for details.
sqrt(3)/2 = 0.866 = $6EDA
constant
MPW
16-bit unsigned integer
16-bit fractional
SQRT3
address of synchronization
channel prescaler parameter:
$X4,
sync_presc_addr 8-bit unsigned integer
where X is synchronization
channel number.
$0 if no synchronization channel
is used.
Parameters written by both TPU and CPU
0 ... CPU can update variables
1 ... TPU can read variables
CPU sets 1, TPU sets 0
LD_OK
1-bit
Parameters written by TPU
The position of Stator Reference
Voltage Vector in a sector. The
Sector can be 1, 2, 3, 4, 5 or 6
If fault channel is used, state of
fault pin:
Sector
16-bit unsigned integer
fault_pinstate
0 or 1
0 ... low
1 ... high
Other parameters are just for TPU function inner use.
Performance
Table 9. svmStd_top State Statistics
State
HL
Max IMB Clock Cycles
RAM Accesses by TPU
2
1
LH_C5
28
10
Table 10. svmStd_bottom State Statistics
State
INIT
STOP
LH
Max IMB Clock Cycles
RAM Accesses by TPU
108
38
2
32
0
1
HL
6
1
LH_RLD
44
16
10
Standard Space Vector Modulation TPU Function Set (svmStd)
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