Freescale Semiconductor, Inc.
* Normal Operation, ignore FREEZE, dual-address mode. ISM field at 3. Make
* sure CPU32 SR I2-I0 bits are less than or equal to ISM bits for channel startup.
* Supervisor/user reg. unrestricted, MAID field at 3. IARB priority at 4.
MOVE.W
#$0334,(A0)
* Clear channel control reg.
* Clear STR (start) bit to prevent the channel from starting a transfer early.
CLR.W
DMACCR1(A0)
* Initialize interrupt reg.
* Interrupt priority at 7, interrupt vector at $42.
MOVE.W
#$0742,DMAINT1(A0)
* Initialize channel status reg.
* Clear the DONE, BES, BED, CONF and BRKP bits to allow channel to startup.
MOVE.B
#$7C,DMACSR1(A0)
* Initialize function code reg.
* DMA space, supervisor data space for source and destination.
MOVE.B
#$DD,DMAFCR1(A0)
* Initialize source operand address
* Source address is equal to $6000.
MOVE.L
SARADD,DMASAR1(A0)
* Initialize destination operand address
* Destination address is equal to $8000.
MOVE.L
DARADD,DMADAR1(A0)
* Initialize the byte transfer count reg.
* The number of bytes to be transferred is $E or 7 words
MOVE.L
NUMBYTE,DMABTC1(A0)
* Channel control reg. init. and Start DMA transfers
* No interrupts are enabled, destination (write) cycle. Increment source and
* destination addresses,source size is word, destination size is word.
* REQ is internal. 100% of bus bandwidth, dual-address transfers,
* start the DMA transfers.
MOVE.W
#$0E8D,DMACCR1(A0)
***************************************************************************
END
***************************************************************************
Example 3: Internal Request Generation, Memory Block Initialization.
***************************************************************************
* MC68340 basic DMA channel register initialization example code.
MOTOROLA
MC68340 USER’S MANUAL
6- 41
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